The XANDAR Project Belfast team participated in the 36^th IEEE SOC Conference, which was held between 5^th-8^th September 2023 in Santa Clara, at the heart of Silicon Vally in US.

The International IEEE System-on-Chip (SoC) conference attracts academic and industrial representatives to showcase the latest advancement on different verticals of SoCs research, like AI, accelerators, Chiplets, sustainability, and industrial applications, just to name a few. As for the XANDAR project, we have shared how our software toolchain contributes to strengthen the security of SoCs and to ensure the specification compliance of embedded systems. In this article, we will outline discussed topics and our contributions at the SOC Conference.

Our first presentation was in the second day of the conference. Our talk addressed problems caused by the complexity and the error-prone process of implementing system security. The XANDAR security monitoring architecture was presented as a potential solution. Aligning with the XANDAR project, we proposed a generic framework that assist developers to implement different security components. Furthermore, the architecture provides system hardening in the form of segregation and class-dependent policies to prevent intrusion in the first place.

In day three of the conference, discussions on safety-critical embedded system were shared during one of the special session. Two major contributions were presented. Starting with the tools that enable developer to automatically incorporate security components in software: security pattern.  Developers can extend the protection provided by the aforementioned security architecture by applying specific solutions (the patterns) when a security context (e.g. when data is being shared) is being encountered. On the other hand, to ensure the un-interruption of safety-critical processes, the cryptographic algorithm used by the security patterns were benchmarked. This information can be utilised during the modelling phase of the XANDAR toolchain to ensure the WCET (Worst-Case Execution Time) of the process can be ensured.

Complementing the XANDAR security architecture, the XANDAR V&V (verification and validation) approach were showcased to the conference audience at the same special session on day three. In the micro level, upon each layer of XANDAR code generation and software development process, static code analysis, model-in-the-loop simulation, and timing analysis will be performed to verify the correctness of the individual part of the software. In the macro level, the V&V framework will validate the developed software reaches the functional and non-functional requirement set out in the modelling process. The V&V activities therefore guarantees the safety and reliability of the systems developed by the XANDAR toolchain by proving the absence of runtime errors.

Want to know more? Please check the IEEE SOCC 2023 Conference Processing on IEEE Xplore!